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dbis
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Publications
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2010
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Complex Event Detection at Wire Speed with FPGAs
VLDB 2010 Reviews
can be adjusted. The one-second example and the four bits used in the text are just sample values. (2) Swapping Algorithm (Reviewer_3, W3) Indeed, there is a typo in Figure 7 (we noticed after submission) [...] inside the state automaton). We will correct the typo in the final version. (3) Latency (Reviewer_3, W2) It is true that a longer pipeline increases latency. However, the latency is still very low. A tuple [...] add significant complexity to the problem. They amplify the state explosion problem (cf. Section 4.2); necessitate partitioning functionality (and thus our pipelining strategy); and introduce the need …